Training seminar 2: Train the chip designer on the identified neural vision models to be realized in chip, and give the neural system modellers the knowledge for VLSI realization. This event will ensure that the chip designers involved in WP2&WP3 gain thorough knowledge about the selected models and the visual system modellers understand the techniques for VLSI realization.
Training seminar 2 was held on 21 May 2018 at Tsinghua University, Beijing, China.
Agenda for the day:
11:00-12:00 Seminar: Host by Prof.Shigang Yue
Motion in Visual World-from Modelling to Application to Summarize Our Group’s Work
12:00-13:30 Lunch time and Networking
13:30-14:00 Short break
14:00-14:40 Presentation by Jiannan Zhao, followed by Q&As